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? semiconductor components industries, llc, 2012 february, 2012 ? rev. 2 1 publication order number: ncp4687/d ncp4687 500 ma, high psrr, ldo linear voltage regulator the ncp4687 is a cmos 500 ma ldo linear voltage regulator with high output voltage accuracy which features a high ripple rejection, low supply current with low dropout and chip enable with built ? in low r ds(on) nmos transistor for fast output capacitor discharging as option. the device is composed of the voltage reference unit, error amplifier, resistor divider for output voltage sensing or precise output voltage setting. the current limit and thermal shutdown makes the device very suitable for industrial applications and portable communication equipments. features ? operating input voltage range: 2.5 v to 5.25 v ? output voltage range: 0.7 to 3.6 v (available in 0.1 v steps) ? 0.8% output voltage accuracy @ v out > 1.8 v ? output noise : 40 v rms ? line regulation: 0.02%/v ? current limit circuit ? high psrr: 75 db at 1 khz, 70 db at 10 khz ? thermal shutdown ? available in sot ? 23 ? 5, sot ? 89 ? 5 and udfn 1.2 x 1.2 mm packages ? pb ? free packages are available typical applications ? home appliances, industrial equipment ? dvb ? t and dvb ? s receivers ? car audio equipment, navigation systems ? notebook adaptors, lcd tvs, cordless phones and private lan systems vin vout ce gnd vin vout ncp4687x sense figure 1. typical application schematic c1 1.0 f c2 1.0 f http://onsemi.com see detailed ordering and shipping information in the package dimensions section on p age 15 of this data sheet. ordering information sot89 ? 5 case 528ab xx, xxx= specific device code mm = date code marking diagrams xdfn6 case 711ah sot ? 23 ? 5 case 1212 xx mm xxx xmm 1 1 xxxmm 1
ncp4687 http://onsemi.com 2 current limit & thermal protection vin gnd vref ce vout sense current limit & thermal protection vin gnd vref ce vout sens e figure 2. simplified schematic block diagram ncp4687xxx ncp4687dxx pin function description pin no. sot ? 23 ? 5 pin no. sot ? 89 ? 5 pin no. dfn1212 pin name description 1 4 6 vin input pin 2 2 3 gnd ground pin 3 3 4 ce chip enable pin (?h? active) 4 1 2 sense output voltage sensing 5 5 1 vout output pin 5 nc non connected *ep ep exposed pad (leave floating or connect to gnd)
ncp4687 http://onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage v in 0 ? 6 v output voltage v out ? 0.3 to v in ? 0.3 v chip enable input v ce ? 0.3 ? 6 v power dissipation sot ? 23 ? 5 p d 420 mw power dissipation udfn 1.2 x 1.2 mm 600 power dissipation sot ? 89 ? 5 900 junction temperature t j ? 40 to 150 c storage temperature t stg ? 55 to 125 c esd capability, human body model (note 1) esd hbm 2000 v esd capability, machine model (note 1) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating tested per jedec standard: jesd78 thermal characteristics rating symbol value unit thermal characteristics, sot ? 23 ? 5 thermal resistance, junction ? to ? air r ja 238 c/w thermal characteristics, udfn 1.2x1.2 thermal resistance, junction ? to ? air r ja 167 c/w thermal characteristics, sot ? 89 ? 5 thermal resistance, junction ? to ? air r ja 111 c/w
ncp4687 http://onsemi.com 4 electrical characteristics ? 40 c t a 85 c; c in = c out = 1.0 f, unless otherwise noted. typical values are at t a = +25 c. parameter test conditions symbol min typ max unit operating input voltage v out 1.5 v v in 2.5 5.25 v v out > 1.5 v v out + 1 5.25 output voltage ta = 25 c, v out > 1.8 v v out x0.992 x1.008 v ? 40 c < ta < 85 c, v out > 1.8 v x0.985 x1.015 v ta = 25 c, v out 1.8 v ? 18 +18 mv ? 40 c < ta < 85 c, v out 1.8 v ? 55 +55 mv output voltage temp. coefficient ? 40 c < ta < 85 c, v out > 1.8 v 30 ppm/ c ? 40 c < ta < 85 c, v out 1.8 v 100 load regulation 1 ma < i out 500 ma load reg 1 20 mv line regulation set v out + 0.5 v < v in < 5.25 v line reg 0.02 0.1 %/v dropout voltage i out = 500 ma 0.7 v v out < 0.8 v v do 0.58 0.88 v 0.8 v v out < 0.9 v 0.52 0.80 0.9 v v out < 1.0 v 0.45 0.70 1.0 v v out < 1.2 v 0.42 0.64 1.2 v v out < 1.4 v 0.35 0.53 1.4 v v out < 1.8 v 0.31 0.48 1.8 v v out < 2.1 v 0.27 0.41 2.1 v v out < 2.5 v 0.25 0.38 2.5 v v out < 3.0 v 0.23 0.34 3.0 v v out < 3.6 v 0.22 0.32 output current i out 500 ma short current limit v out = 0 v i sc 50 ma quiescent current i out = 0 ma v out > 1.5 v i q 80 115 a v out 1.5 v 75 standby current v in = v in max , v ce = 0 v i stb 0.1 1.0 a ce pin pull ? down current i pd 0.3 0.6 a ce pin threshold voltage ce input voltage ?h? v ceh 1.0 v in v ce input voltage ?l? v cel 0.4 power supply rejection ratio v out 2.0 v @ v in = 3.0 v, v out > 2.0 v @ v in = = set v out + 1.0 v, v in_pk ? pk = 0.2 v, i out = 30 ma f = 1 khz psrr 75 db f = 10 khz 70 output noise voltage i out = 30 ma , f = 10 hz to 100 khz, v out > 1.8 v v noise 20 x v out v rms i out = 30 ma, f = 10 hz to 100 khz, v out 1.8 v 40 x v out thermal shutdown / hysteresis 165/65 c auto ? discharge n ? mos resistance v in = 4.0 v, v ce = 0.0 v (note 2) r ds(on) 60 2.
ncp4687 http://onsemi.com 5 typical characteristics 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 100 200 300 400 500 600 700 800 figure 3. output voltage vs. output current 0.7 v version i out , output current (ma) v out , output voltage (v) v in = 1.4 v 1.7 v 2.7 v 3.5 v 0 0.5 1 1.5 2 2.5 3 0 100 200 300 400 500 600 700 800 900 v in = 4.0 v 3.5 v 3.0 v figure 4. output voltage vs. output current 2.5 v version i out , output current (ma) v out , output voltage (v) 0 0.5 1 1.5 2 2.5 3 3.5 4 0 100 200 300 400 500 600 700 800 figure 5. output voltage vs. output current 3.6 v version i out , output current (ma) v out , output voltage (v) v in = 4.1 v 4.6 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0123456 v out , output voltage (v) figure 6. output voltage vs. input voltage 0.7 v version v in , input voltage (v) i out = 50 ma 30 ma 1 ma 0 0.5 1 1.5 2 2.5 3 0123456 v out , output voltage (v) figure 7. output voltage vs. input voltage 2.5 v version v in , input voltage (v) 1 ma 30 ma i out = 50 ma 0 0.5 1 1.5 2 2.5 3 3.5 4 0123456 v out , output voltage (v) figure 8. output voltage vs. input voltage 3.6 v version v in , input voltage (v) 1 ma 30 ma i out = 50 ma
ncp4687 http://onsemi.com 6 typical characteristics 0.67 0.68 0.69 0.7 0.71 0.72 ? 50 ? 25 0 25 50 75 100 t j , junction temperature ( c) v out , output voltage (v) figure 9. output voltage vs. temperature, 0.7 v version 2.45 2.47 2.49 2.51 2.53 2.55 ? 50 ? 25 0 25 50 75 100 t j , junction temperature ( c) v out , output voltage (v) figure 10. output voltage vs. temperature, 2.5 v version 3.57 3.58 3.59 3.6 3.61 3.62 t j , junction temperature ( c) v out , output voltage (v) figure 11. output voltage vs. temperature, 3.6 v version ? 50 ? 25 0 25 50 75 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 100 200 300 400 500 i out , output current (ma) v do , dropout voltage (v) figure 12. dropout voltage vs. output current, 0.7 v version 25 c 85 c ? 40 c 0 0.05 0.1 0.15 0.2 0.25 0.3 0 100 200 300 400 500 i out , output current (ma) v do , dropout voltage (v) figure 13. dropout voltage vs. output current, 2.5 v version 25 c 85 c ? 40 c 0 0.05 0.1 0.15 0.2 0.25 0 100 200 300 400 500 i out , output current (ma) v do , dropout voltage (v) figure 14. dropout voltage vs. output current, 3.6 v version 25 c 85 c ? 40 c
ncp4687 http://onsemi.com 7 typical characteristics 0 20 40 60 80 100 0123456 v in , intput voltage (v) i q , quiescent current ( a) figure 15. quiescent current vs. input voltage, 0.7 v version 0 20 40 60 80 100 120 0123456 v in , intput voltage (v) figure 16. quiescent current vs. input voltage, 2.5 v version i q , quiescent current ( a) 0 20 40 60 80 100 120 140 0123456 v in , intput voltage (v) i q , quiescent current ( a) figure 17. quiescent current vs. input voltage, 3.6 v version 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m frequency (hz) figure 18. psrr vs. frequency, 0.7 v version psrr (db) i out = 1 ma 150 ma 50 ma 300 ma 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m frequency (hz) psrr (db) figure 19. psrr vs. frequency, 2.5 v version 150 ma 300 ma i out = 1 ma 50 ma 10 20 30 40 50 60 70 80 90 100 100 1k 10k 100k 1m 50 ma i out = 1 ma 300 ma 150 ma frequency (hz) figure 20. psrr vs. frequency, 3.6 v version psrr (db)
ncp4687 http://onsemi.com 8 typical characteristics 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 figure 21. output noise vs. frequency, 0.7 v version v n ( v rms / hz ) frequency (hz) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 figure 22. output noise vs. frequency, 2.5 v version frequency (hz) v n ( v rms / hz ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 figure 23. output noise vs. frequency, 3.6 v version v n ( v rms / hz ) frequency (hz) 1.7 2.2 2.7 3.2 0.680 0.685 0.690 0.695 0.700 0.705 0.710 0 4 8 12 16 20 24 28 32 36 40 figure 24. line transients, 0.7 v version v out (v) t ( s) v in (v) 100 1k 10k 100k 1m 10 100 1k 10k 100k 1m 10 100 1k 10k 100k 1m 10
ncp4687 http://onsemi.com 9 typical characteristics 3.5 4.0 4.5 5.0 2.480 2.485 2.490 2.495 2.500 2.505 2.510 0 4 8 12 16 20 24 28 32 36 40 figure 25. line transients, 2.5 v version v out (v) t ( s) v in (v) 4.6 5.1 5.6 6.1 3.580 3.585 3.590 3.595 3.600 3.605 3.610 0 4 8 12 16 20 24 28 32 36 40 figure 26. line transients, 3.6 v version v out (v) t ( s) v in (v) 0 200 400 600 0.62 0.64 0.66 0.68 0.70 0.72 0.74 0 102030405060708090100 figure 27. load transients, 0.7 v version, load step 1 ma to 400 ma v out (v) t ( s) i out (ma)
ncp4687 http://onsemi.com 10 typical characteristics 2.42 2.44 2.46 2.48 2.50 2.52 2.54 0 102030405060708090100 600 400 200 0 figure 28. load transients, 2.5 v version, load step 1 ma to 400 ma v out (v) t ( s) i out (ma) 0 200 400 600 3.52 3.54 3.56 3.58 3.60 3.62 3.64 0 102030405060708090100 figure 29. load transients, 3.6 v version, load step 1 ma to 400 ma v out (v) t ( s) i out (ma) 0 50 100 150 0.680 0.685 0.690 0.695 0.700 0.705 0.710 0.715 0 102030405060708090100 v out (v) t ( s) i out (ma) figure 30. load transients, 0.7 v version, load step 50 ma to 100 ma
ncp4687 http://onsemi.com 11 typical characteristics 0 50 100 150 2.480 2.485 2.490 2.495 2.500 2.505 2.510 2.515 0 102030405060708090100 v out (v) t ( s) i out (ma) figure 31. load transients, 2.5 v version, load step 50 ma to 100 ma 0 50 100 150 3.580 3.585 3.590 3.595 3.600 3.605 3.610 3.615 0 102030405060708090100 v out (v) t ( s) i out (ma) figure 32. load transients, 3.6 v version, load step 50 ma to 100 ma 0 1.25 2.5 3.75 ? 0.2 0.0 0.2 0.4 0.6 0.8 0 50 100 150 200 250 300 v out (v) t ( s) v ce (v) figure 33. turn on with ce behavior, 0.7 v version chip enable i out = 1 ma i out = 100 ma i out = 400 ma
ncp4687 http://onsemi.com 12 typical characteristics 0 1.75 3.5 5.25 ? 0.5 0.0 0.5 1.0 1.5 2.0 2.5 0 50 100 150 200 250 300 v out (v) t ( s) v ce (v) figure 34. turn on with ce behavior, 2.5 v version chip enable i out = 1 ma i out = 100 ma i out = 400 ma ? 1.0 0.0 1.0 2.0 3.0 4.0 0 50 100 150 200 250 300 6 4 2 0 v out (v) t ( s) v ce (v) figure 35. turn on with ce behavior, 3.6 v version chip enable i out = 1 ma i out = 100 ma i out = 400 ma 0 1.25 2.5 3.75 ? 0.2 0.0 0.2 0.4 0.6 0.8 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) t (ms) v ce (v) figure 36. turn off with ce behavior, 0.7 v version i out = 1 ma i out = 100 ma i out = 500 ma chip enable
ncp4687 http://onsemi.com 13 typical characteristics 0 1.75 3.5 5.25 ? 0.5 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v out (v) t (ms) figure 37. turn off with ce behavior, 2.5 v version i out = 1 ma i out = 100 ma i out = 500 ma chip enable 0.0 2.3 4.6 6.9 ? 1 0 1 2 3 4 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v ce (v) v out (v) t (ms) figure 38. turn off with ce behavior, 3.6 v version v ce (v) i out = 1 ma i out = 100 ma i out = 500 ma chip enable
ncp4687 http://onsemi.com 14 application information a typical application circuit for ncp4687 series is shown in the figure 39. vin vout ce gnd vin vout ncp4687x sense figure 39. typical application schematic c1 1.0 f c2 1.0 f input decoupling capacitor (c1) a 1.0 f ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the ncp4687 device. higher values and lower esr improves line transient response. output decoupling capacitor (c2) a 1.0 f ceramic output decoupling capacitor is suf ficient to achieve stable operation of the device. if tantalum capacitor is used, and its esr is high, the loop oscillation may result. the capacitor should be connected as close as possible to the output and ground pin. larger values and lower esr improves dynamic parameters. enable operation the enable pin ce may be used for turning the regulator on and off. the ic is switched on when a high level voltage is applied to the ce pin. the enable pin has an internal pull down current source which assure off state of ldo in case the ce pin will stay floating. if the enable function is not needed connect ce pin to v in . the d version of the ncp4687 device includes a transistor between v out and gnd that is used for faster discharging of the output capacitor. this function is activated when the ic goes into disable mode. thermal consideration as a power across the ic increase, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature increase for the part. when the device has good thermal conductivity through t he pcb the junction temperature will be relatively low in high power dissipation applications. the ic includes internal thermal shutdown circuit that stops operation of regulator, if junction temperature is higher than 165 c. after that, when junction temperature decreases below 100 c, the operation of voltage regulator would restart. while high power dissipation condition is, the regulator starts and stops repeatedly and protects itself against overheating. sense pin the sense pin improves significantly the load regulation. the connection resistance between the ldo and the load given by pcb parameters has reduced impact to load regulation. if possible, use wide pcb traces as short as possible.
ncp4687 http://onsemi.com 15 ordering information device marking nominal output voltage feature package shipping ? ncp4687dh12t1g a12d 1.2 v auto discharge sot ? 89 (pb ? free) 1000 / tape & reel ncp4687dh15t1g a15d 1.5 v auto discharge sot ? 89 (pb ? free) 1000 / tape & reel ncp4687dh18t1g a18d 1.8 v auto discharge sot ? 89 (pb ? free) 1000 / tape & reel ncp4687dh25t1g a25d 2.5 v auto discharge sot ? 89 (pb ? free) 1000 / tape & reel NCP4687DH33T1G a33d 3.3 v auto discharge sot ? 89 (pb ? free) 1000 / tape & reel ncp4687dmx18tcg 9p 1.8 v auto discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4687dmx25tcg 9x 2.5 v auto discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4687dmx33tcg 0g 3.3 v auto discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4687dsn18t1g j18 1.8 v auto discharge sot ? 23 (pb ? free) 3000 / tape & reel ncp4687dsn25t1g j25 2.5 v auto discharge sot ? 23 (pb ? free) 3000 / tape & reel ncp4687dsn28t1g j28 2.8 v auto discharge sot ? 23 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging spe- cifications brochure, brd8011/d.
ncp4687 http://onsemi.com 16 package dimensions sot ? 23 5 ? lead case 1212 ? 01 issue a dim min max millimeters a1 0.00 0.10 a2 1.00 1.30 b 0.30 0.50 c 0.10 0.25 d 2.70 3.10 e 2.50 3.10 e1 1.50 1.80 e 0.95 bsc l l1 0.45 0.75 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. datum c is the seating plane. a 1 5 23 4 d e1 b l1 e e c m 0.10 c s b s a b 5x a2 a1 s 0.05 c l 0.20 --- *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.95 dimensions: millimeters pitch 5x 3.30 0.56 5x 0.85 a --- 1.45 recommended a
ncp4687 http://onsemi.com 17 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25mm from terminal tips. 4. coplanarity applies to all of the terminals. a seating plane d e 0.05 c a a1 2x 2x 0.05 c xdfn6 1.20x1.20, 0.40p case 711ah issue o dim a min max millimeters --- 0.40 a1 0.00 0.05 b 0.13 0.23 d e e l pin one reference 0.05 c 0.05 c note 3 l e b 3 6 6x 1 4 mounting footprint* 0.15 0.25 bottom view e2 dimensions: millimeters 0.40 6x 0.24 6x 1.40 0.40 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. e2 0.25 0.35 top view b side view note 4 recommended c 6x a m 0.05 b c package outline d2 0.89 0.99 l1 1.20 bsc 1.20 bsc 0.40 bsc 0.05 bsc d2 1.00 0.36
ncp4687 http://onsemi.com 18 package dimensions sot ? 89, 5 lead case 528ab ? 01 issue o mounting footprint* recommended c 0.10 top view side view bottom view c h 1 dim min max millimeters a 1.40 1.60 b1 0.37 0.57 b 0.32 0.52 c 0.30 0.50 d 4.40 4.60 d2 1.40 1.80 e 2.40 2.60 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. lead thickness includes lead finish. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. 5. dimensions l, l2, l3, l4, l5, and h are meas- ured at datum plane c. e 1.40 1.60 l 1.10 1.50 h 4.25 4.45 l2 0.80 1.20 l3 0.95 1.35 l4 0.65 1.05 l5 0.20 0.60 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. d e a c 23 54 l l5 e e b b1 l2 d2 l4 l3 2x 0.62 dimensions: millimeters 1 2x 1.50 1.30 2.79 0.45 1.50 1.65 4.65 4x 0.57 1.75 1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp4687/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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